This article makes recommendations for how an administrator can get up to speed quickly on the Intel® Many Integrated Core (Intel® MIC) Architecture. This article is 1 of 3: For the Administrator, for the Developer, and for the Investigator.
Administrator– This is someone whose responsibility will be to administrate an Intel® Xeon Phi™ coprocessors, whether a single server with one or more cards, or a large cluster.
Developer– This is someone who will be programming on a Intel Xeon Phi coprocessor.
Investigator– This is someone who is evaluating whether their facility or staff should support the coprocessor. This also includes persons who desire to learn more about the coprocessor but who are not currently tasked to program or administer an Intel MIC system.
These articles make certain assumptions about what topics are most important to individuals in the different categories. For example, the documentation on cluster administration probably is not of interest to a developer. Similarly, the syntax and semantics of kmp_affinity is of little interest to an administrator. And though an investigator may be a programmer, they are unlikely to consider the syntax and semantics of the “pragma simd” annotation playing any significant role in an investigation of whether their facility should support an Intel Xeon Phi coprocessor cluster.
The following lists lay out the most important categories that an administrator wants to know. References addressing those categories then follow. The intent of these references is not to be inclusive but only a good starting point. As an administrator, you will need to explore beyond these areas, but it is hoped that this article provides the beginnings of a path to help you along your way.
TERMINOLOGY AND NOTATION
MIC-IDZ – http://software.intel.com/mic-developer; this is the “Landing page” on the Intel® Developer Zone for Intel Many Integrated Core (Intel MIC) technical information.
AAA => BBB => CCC – This is a simple notation for navigating links, sections, documents, etc. Its intent is to be simple and clear but not precise. Even so, it should be obvious as to where to navigate next. For example, depending upon its context, “=> BBB” could mean “got to tab BBB”, “look under section BBB” or “open document BBB”.
Who is an Administrator?
Someone who will administer and support a set of machines (individual/cluster) containing coprocessors. The assumption is that the following topics are of most interest to him.
- Administrative tools and configurations for the Intel® Manycore Platform Software Stack (Intel® MPSS)
- Technical support services
- Library support
- Language support
- Network infrastructure
- Installation documentation
- Cluster administration and FAQ
- Scripting support
The list below describes how to navigate to resources that address these interests. A more direct URL is also given. Note that the URL and navigation may change at some point in the future.
We suggest using the navigation instructions. Even if the navigation changes slightly, you will still be able to get to the information. You will also discover the locations of other information that you will find useful as you continue to work with the coprocessor.
Technical Resources
Intel Manycore Platform Software Stack (Intel MPSS)
- Admin tools
Navigation: MIC-IDZ => Overview => “System Administration Guide”+
URL:http://software.intel.com/en-us/articles/system-administration-for-the-intel-xeon-phi-coprocessor
- Configurations
Navigation: MIC-IDZ => Tools & Downloads => “Software Drivers: Intel Manycore Platform Software Stack (Intel MPSS)”
URL:http://software.intel.com/en-us/articles/intel-manycore-platform-software-stack-mpss; see the MPSS_Boot_Config_Guide.pdf
Support
- Resources
Navigation: MIC-IDZ
URL:http://software.intel.com/mic-developer
- Questions (Intel)
Navigation: MIC-IDZ => Get Support => Intel® Many Integrated Core Architecture Forum
URL:http://software.intel.com/en-us/forums/intel-many-integrated-core
- Training and questions
Colfax Research: http://www.colfax-intl.com/nd/xeonphi.aspx
Texas Advanced Computing Center (TACC): http://www.tacc.utexas.edu/user-services/training
Acceleware: http://www.acceleware.com/xeon-phi-training
CAPS: http://www.caps-entreprise.com
Purdue University: http://www.rcac.purdue.edu/userinfo/resources/conte/
Languages available from Intel
- Compilers
Navigation: MIC-IDZ => Software Development Products => Intel® C/C++ and Fortran Compilers
URL:http://software.intel.com/en-us/intel-composer-xe
Navigation: MIC-IDZ => Software Development Products => Intel C/C++ and Fortran Compilers => Related Content => Documentation => (C/C++ or Fortran)
URL (C/C++): http://software.intel.com/articles/intel-c-composer-xe-documentation
URL (Fortran): http://software.intel.com/articles/intel-fortran-composer-xe-documentation/
Navigation: MIC-IDZ => Search( “OpenCL* Phi ) => OpenCL on Xeon Intel Xeon Phi
URL:http://software.intel.com/en-us/forums/topic/382241#comment-1729511
- Scripting
The coprocessor and host use standard Linux* which supports the standard scripting languages. Note that since the Linux on the coprocessor is minimal, you may have to compile interpreters for the coprocessor.
Libraries available from Intel
- Intel® Math Kernel Library
Navigation: MIC-IDZ => Software Development Products => Intel Math Kernel Library
URL:http://software.intel.com/en-us/intel-mkl
- Intel® Threading Building Blocks 4.1
Navigation: MIC-IDZ => Software Development Products => Intel Parallel Studio XE => Intel Threading Building Blocks
URL:http://software.intel.com/en-us/intel-tbb
- Intel® MPI Library
Navigation: MIC-IDZ => Software Development Products => Intel MPI Library
URL:http://software.intel.com/en-us/intel-mpi-library
- Intel® SDK for OpenCL Applications 2013
Navigation: software.intel.com/ search => You searched for:(opencl sdk) => “Landing Page” => Intel SDK for OpenCL Applications 2013
URL: http://software.intel.com/en-us/vcsource/tools/opencl-sdk
- Building 3rd party libraries
Navigation: MIC-IDZ => Programming => Programming => Building Native Applications => “Building a Native Application for Intel Xeon Phi Coprocessors” => Building Libraries
URL:http://software.intel.com/en-us/articles/building-a-native-application-for-intel-xeon-phi-coprocessors
Networking infrastructure
The host and coprocessor use a standard Linux OS and support most of the typical networking protocols. Note that “support” does not imply they are in the default installation. See the Intel MPSS User Guide, and the System Administration Guide.
SW locations:
Standard Intel compiler, library and tool installations. As is the nature of such locations, they may change with a new installation version.
Host: /opt/intel
Coprocessor: /lib64, /usr/lib64
Installation
- (Linux): MIC-IDZ => Overview => Guides & Manuals => Intel® Xeon Phi™ Coprocessor Developer’s Quick Start Guide => Download Entire Articles => “Intel® Xeon Phi™ Coprocessor Developer's Quick Start Guide”
Navigation (Windows*): MIC-IDZ => Overview => Guides & Manuals => Intel® Xeon Phi™ Coprocessor Developer’s Quick Start Guide => Download Entire Articles => “Intel® Xeon Phi™ Coprocessor Developer's Quick Start Guide for Windows”
URL (Linux): http://software.intel.com/sites/default/files/article/335818/intel-xeon-phi-coprocessor-quick-start-developers-guide.pdf
URL (Windows): http://software.intel.com/sites/default/files/article/335818/intel-xeon-phi-coprocessor-quick-start-developers-guide-windows-v1-2.pdf
Cluster Admin
- General
Navigation: MIC-IDZ => Overview => Guides & Manuals => System Administration => Useful Documentation
URL: http://software.intel.com/en-us/articles/system-administration-for-the-intel-xeon-phi-coprocessor
Navigation: MIC-IDZ => Overview => Guides & Manuals => System Administration => Useful Documentation => Configuring Intel Xeon Phi coprocessors inside a cluster++
URL: http://software.intel.com/sites/default/files/650_Intel_R__Xeon_Phi_tm__Cluster_configuration-v081.pdf
- Gauging System Health: micsmc, micperf, micras, imb, Ganglia*,
Navigation: MIC-IDZ => Tools & Downloads => Software Drivers: Intel Manycore Platform Software Stack (Intel MPSS) => MPSS 3.x release for Linux => MPSS_Users_Guide.pdf
URL: http://registrationcenter.intel.com/irc_nas/3678/MPSS_Users_Guide.pdf
Navigation: MIC-IDZ => Tools & Downloads => Software Drivers: Intel Manycore Platform Software Stack (Intel MPSS) => MPSS 3.x release for Microsoft Windows* => MPSS_Users_Guide.pdf
URL: http://registrationcenter.intel.com/irc_nas/3574/Windows_MPSS_Users_Guide.pdf
Navigation: MIC-IDZ => Tools & Downloads => Intel Xeon Phi Coprocessor Software Developer’s Guide => section 2.2.7.2 (Ganglia support)
URL: http://software.intel.com/en-us/articles/intel-xeon-phi-coprocessor-system-software-developers-guide
Navigation: MIC-IDZ => Intel Many Integrated Core Architecture Forum => “MICRAS Log User Guide”
URL: http://software.intel.com/sites/default/files/Intel(R)_Xeon_Phi(TM)_Coprocessor_MicRAS_Log_User_Guide.pdf.
Navigation: MIC-IDZ => Tools & Downloads => Software Drivers: Intel Manycore Platform Software Stack (Intel MPSS) => MPSS 2.1 release for Linux => Documentation link => readme-en.txt => 8.7 Micrasd
URL: http://registrationcenter.intel.com/irc_nas/3672/readme-en.txt
Also: Usual system health utilities
Admin FAQ
- : MIC-IDZ => Overview => Guides & Manuals => System Administration => Useful Documentation
URL: http://software.intel.com/en-us/articles/system-administration-for-the-intel-xeon-phi-coprocessor
+As of December 9th, 2013, this document needs to be updated to the new MPSS 3.x version.
++As of December 9th, 2013, this document will soon be updated to the new MPSS 3.x version.