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Why Efficient Use of the Memory Subsystem Is Critical to Performance
The cores and vector processors on modern multi-core processors are voracious consumers of data. If you do not organize your application to supply data at high-enough bandwidth to the cores, any work...
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What's New? - Intel® VTune™ Amplifier XE 2016 Update 4
Intel® VTune™ Amplifier XE 2016 performance profilerA performance profiler for serial and parallel performance analysis. Overview, training, support.New for the 2016 Update 4! (Optional update unless...
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Efficient SIMD in Animation with SIMD Data Layout Templates (SDLT) and Data...
IntroductionIn order to get the most out of SIMD,1 the key is to put in effort beyond just getting it to vectorize.2 It is tempting to add a #pragma omp simd3 to your loop, see that the compiler...
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Recipe: Building and Running MASNUM WAVE for Intel® Xeon Phi™ Processors
I. OverviewThis article provides a recipe for how to obtain, compile, and run an optimized version of MASNUM WAVE (0.2 degree high resolution) workload on Intel® Xeon® processors and Intel® Xeon Phi™...
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Recipe: Pricing Options Using Barone-Adesi Whaley Approximation
IntroductionMany people have discussed how parallel programming practice can be applied to the Black-Scholes model and the Black-Scholes formula that prices European options analytically. They have...
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Recipe: RELION for Intel® Xeon Phi™ 7250 processor
I. OverviewThis article provides a recipe for how to obtain, compile, and run an optimized version of relion-1.4 on Intel® Xeon® processors and Intel® Xeon Phi™ processors.The source for this version...
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Recipe: The Black-Scholes-Merton Formula Optimization for Intel® Xeon Phi™...
IntroductionFinancial derivative pricing is a cornerstone of quantitative finance. The most common form of financial derivatives is common stock options, which are contracts between two parties...
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Tutorial on Intel® Xeon Phi™ Processor Optimization
Download File[TAR 20KB]1. IntroductionIn this tutorial, we demonstrate some possible ways to optimize an application to run on the Intel® Xeon Phi™ processor. The optimization process in this tutorial...
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Meet the Experts - Gergana Slavova
Gergana SlavovaTechnical Consulting EngineerGergana Slavova received her bachelor’s degree in computer science at the University of Illinois at Urbana-Champaign in 2005. Following graduation, she...
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Recipe: Building and Running VLPL-S for Intel® Xeon Phi™ Processors
I. OverviewThis article provides a recipe for how to obtain, compile, and run an optimized version of VLPL-S on Intel® Xeon® processors and Intel® Xeon Phi™ processors.The source for this version of...
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[Series] Know Your Customer: Defining Audience Personas
No matter what you’re building, whether it’s a racing game or a calendar app, it’s important to remember the customer who’s at the center of it all. Ask yourself who you’re building this for. Your...
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Intel® Threading Building Blocks Celebrates 10 Years!
The new special issue of The Parallel Universe magazine celebrates the 10th anniversary of what some have called the most important new addition to parallel programming in the last decade: Intel®...
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SDN, NFV, DPDK, ONP, OPNFV and more!
Why does Intel contribute to the SDN and NFV communities?Software Defined Networking (SDN) and Network Functions Virtualization (NFV) are moving out of the labs and into production deployments as a...
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An Introduction to Intel® Active Management Technology Wireless Connections
Introduction to Intel® Active Management Technology WirelessWith the introduction of wireless-only platforms starting with Intel Active Management Technology (Intel® AMT) 10, it is even more important...
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Arduino 101* Bluetooth* Low Energy
IntroductionBluetooth* Low Energy (Bluetooth LE or BLE) is a low-power, short-range wireless communication technology that is ideal for use on the Internet of Things (IoT). BLE is designed for small...
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A Support Vector Machine Implementation for Sign Language Recognition on...
Currently, more than 30 million people in the world have speech impairments and thus to communicate have to use sign language resulting in a language barrier between sign language and non-sign language...
View ArticleRetired Articles Related to the Intel® C++ and Fortran Compliers
The article you are looking for has been retired!The article is no longer applicable to the Supported Intel® C++/Fortran Compiler Versions.Refer to the latest Intel® C++/Fortran Compiler...
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Selftime-based FLOPS computing (Vectorization Advisor)
Let's talk about important specifics of computing FLOPS that can significantly affect FLOPS data interpretation especially in the Roofline chart.At the moment, we are computing FLOPS using self-time...
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Getting started with Intel® Advisor Roofline feature
This document describes the suggested scenario for using Roofline feature of Intel® Advisor.Intel® Advisor XE can be executed as a standalone GUI tool or integrated Visual Studio plug-in on Windows or...
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Intel® XDK FAQs - General
How can I get started with Intel XDK?Can I use an external editor for development in Intel® XDK?How do I get code refactoring capability in Brackets* (the Intel XDK code editor)?Why doesn’t my app show...
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