Regulatory pressures, which increase the amount of required computing, the need to improve operational efficiency and competition, which require faster computing, are among the drivers that incent financial institutions to pursue significant improvements in computational efficiencies. As improvement in sequential computing slowed down, the adoption of parallel computing is growing noticeably.
Until recently, CPUs where thought of as engines for sequential computing. They improved performance through increased frequencies and architectural techniques such as out of order execution. By contrast, parallel computing was thought of as needing acceleration, and offloading onto a different compute engine. Contrast that thinking with modern day CPUs, where servers such as Intel® Xeon® based servers offer as many as 56 cores with Intel® Advanced Vector Extensions technology, while still providing high per-core performance via out of order execution, and the conclusion is that a CPU is a forceful platform for parallel computing. The presentation will provide data on the growth of parallelism in hardware, data on how that growth impacts performance of parallelized financial algorithms such as Binomial Option, Monte Carlo and LIBOR. These applications see speed-ups of up to 200X on a Intel® Xeon® based server, between their sequential and a parallel versions. Finally, the presentation will describe best practices in transitioning these algorithms to parallel computing.
Presenter: Robert Geva (Intel)
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