Based on Intel® Core™ microarchitecture (code-named Broadwell) and manufactured on 14-nanometer process technology, these processors provide significant performance over the previous-generation Intel® Xeon® processor E5 v3 product family. This Intel® Xeon® processor family introduces new instructions that will benefit integer operations and enhance security as well as new technologies to make better use of the last level cache and to monitor the memory bandwidth.
For a more in-depth discussion of the key features and the architecture of the Intel® Xeon® E5 v4 product family see the technical overview document.
Key supported features you should be aware of, as a Software Developer:
- New instruction supporting cryptography. New instruction RDSEED provides high-quality seed values for software pseudo-random number generators. This article shows the difference between RDRAND and RDSEED.
- New instructions supporting integer. Two new instructions ADCX and ADOX improve the performance of large-integer applications.
- Resource Director Technology (RDT). RDT Introduces three new features called Cache Allocation Technology (CAT), Memory Bandwidth Monitoring (MBM), and Code and Data Prioritization (CDP). CAT allows the OS to specify how much cache space an application can utilize, while MBM monitors how much memory bandwidth is utilized and CDP limits how much cache space data can utilize to make room code in the last level cache. More information about these features can be found here.
Case studies:
- Performance Comparison of OpenBLAS and Intel(R) Math Kernel Library
- Accelerating Load Balancers with Intel(R) Xeon(R) Processors E5 v4
- Understanding NUMA for 3D finite difference code with an Isotropic
Learn more about the Intel® Xeon® E7 v3 product family here.