The Power of Simplicity
Intel at ISC’ 13
Intel® Cluster Ready is all about simplicity—making it simpler to design, purchase, deploy, and use high-performance computing (HPC) clusters. Few disciplines are as inherently complex as HPC, so increasing simplicity offers tangible benefits in faster time to market, higher quality, and fewer roadblocks to innovation.
The power of this approach was evident at this year’s International Supercomputing Conference (ISC’13) in Leipzig, Germany. Intel Cluster Ready was flying high—literally—with more than 20 helium-filled balloons suspended over Partner booths. Support for Intel Cluster Ready continues to grow, with IBM certifying a solution using System X iDataPlex and IBM's PCM just prior to ISC’ 13.
Intel Cluster Ready was also flying high figuratively, as could be seen by the broad Partner participation at the conference. IBM, E4, Fujitsu, and seven other Intel Cluster Ready partners provided theater talks and participated in the Intel Cluster Ready self-guided tour, as did Werner Krotz-Vogel from the Software and Solutions Group at Intel.
Intel showcased more than Intel Cluster Ready at ISC’ 13, which is not surprising since Intel has increased its investment and commitment across the full spectrum of HPC. Stephen Wheat, General Manager of HPC at Intel, provided a high-level outline of Intel’s focus on HPC in his talk at the ISC’13 Vendor Showdown.
The Intel® Xeon Phi™ coprocessor was a key focus for Stephen, and also for Raj Hazra, Vice President, Datacenter & Connected Systems Group, General Manager, Technical Computing Group, in his keynote speech. Raj noted that, in just the six months since it was launched, the Intel Xeon Phi coprocessor has outstripped graphical processing units (GPUs) in total performance share within the world’s 500 largest supercomputers (based on the latest Top500 list). He also discussed how these coprocessors, in combination with the upcoming Intel® Xeon® processor E5 v2 product family, are powering the world’s fastest supercomputer, Milky Way 2. Built for the National Supercomputing Center in Guangzhou, China, this massive system is based solely on Intel ®CPUs and coprocessors. It delivers a peak performance of 54.9 PFlops, more than doubling the performance of the previous, top-rated system on the Top500 list. Current plans include expanding the system to achieve 100 PFlops by 2015.
The latest Intel Xeon processors were also highlighted in the Intel booth, with a demonstration by Audi and Autodesk showing how the two have collaborated to implement real-time predictive rendering for automobile designs. Backed by a 52-node cluster that included Intel Xeon processor E5-2600 family v2, visualizations were near-instantaneous and visitors were astonished by the realism when they compared it with the physical version of the car, which was right by the booth. Of course, the real value is being experienced by Audi design teams as they move from physical to digital prototyping, which allows them to test far more design options and greatly reduce the need for costly, time-consuming physical prototypes.
The rapid adoption of the Intel Xeon Phi coprocessor is about more than performance and energy efficiency. Like Intel Cluster Ready, it not only helps to drive higher performance, but also provides an opportunity to dramatically simplify today’s heterogeneous cluster environments. Since Intel Xeon Phi coprocessors support the same x86 instruction set as Intel Xeon processors, HPC development teams can use either, or both, to run existing application code. They can maintain a single code base regardless of their targeted level of parallelism, and they can optimize their code just once for both processors and coprocessors.
Intel also provided a peek into the next-generation of the Intel Xeon Phi coprocessor. Two major attributes were revealed. First, the next generation will be able to function not only as a coprocessor, but also as a fully-functional, standalone processor, so hardware vendors and their customers will have more flexibility for optimizing cluster designs to match workload requirements. Second, the next generation will include integrated, on-package memory to help eliminate the performance-sapping memory bandwidth bottlenecks that are prevalent in HPC today.
Bringing it All Together
The simplifying forces of Intel Cluster Ready and Intel® Architecture deliver even higher value together. The Intel Cluster Ready architecture and Intel® Cluster Checker provide full support for Intel Xeon Phi coprocessors, and many Intel Cluster Ready partners offer optimized hardware, middleware and end-user applications.
One example at ISC’ 13 was particularly noteworthy. Bright Computing, the leading provider of vendor-independent cluster management solutions, demonstrated Bright Cluster Manager* 6.1 at its booth. This software simplifies the deployment and management of today’s complex cluster environments. The latest iteration delivers a variety of advanced features, including cross-platform user interfaces and support for cloud-based solutions. It not only supports the Intel Cluster Ready architecture, but also provides full support for Intel Xeon Phi coprocessors, making it simpler than ever to integrate them into next-generation cluster designs.
As we continue moving toward exascale performance and the era of pervasive HPC, every move toward greater simplicity will help. Intel Cluster Ready architecture—and Intel architecture in general—will be at the heart of these efforts.
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